error catching
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@ -749,7 +749,7 @@ let pass_typing verbose debug ast =
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else None
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in aux ast
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let check_automata_validity verbos debug =
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let check_automata_validity verbose debug =
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let check_automaton_branch_vars automaton =
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let (init, states) = automaton in
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let left_side = Hashtbl.create 10 in
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@ -774,8 +774,11 @@ let check_automata_validity verbos debug =
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end
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in
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let aux node =
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try
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List.iter check_automaton_branch_vars node.n_automata;
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Some node
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with
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| PassExn err -> (verbose err; None)
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in
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node_pass aux
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@ -922,9 +925,12 @@ let automata_translation_pass verbose debug =
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eqs@eqs_end, (ty@ty_end, vars@vars_end)
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in
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let aux node =
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let eqs, (ty, vars) = iter_automata node.n_automata in
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let (ty_old, vars_old) = node.n_local_vars in
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Some { node with n_local_vars = (ty@ty_old, vars@vars_old); n_equations = node.n_equations@eqs; n_automata = []}
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try
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let eqs, (ty, vars) = iter_automata node.n_automata in
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let (ty_old, vars_old) = node.n_local_vars in
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Some { node with n_local_vars = (ty@ty_old, vars@vars_old); n_equations = node.n_equations@eqs; n_automata = []}
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with
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|PassExn err -> (verbose err; None)
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in
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node_pass aux
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@ -1060,9 +1066,14 @@ let clock_unification_pass verbose debug ast =
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snd n.n_local_vars); (* Initializing local variables to Unknown clock *)
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List.iter (fun v -> Hashtbl.replace known_clocks v Base) (
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snd n.n_outputs); (* Initializing outputs to base clock *)
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iter_til_stable n.n_equations;
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(* catch potential errors and test for unification *)
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check_unification n;
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Some n
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try
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begin
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iter_til_stable n.n_equations;
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(* catch potential errors and test for unification *)
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check_unification n;
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Some n
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end
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with
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| PassExn err -> (verbose err; None)
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end
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in node_pass compute_clock_node ast
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